A (DRAM) stores digital data in an array of memory cells. Each memory cell has a specific address which is essentially the intersection formed by a wordline and a digit line. Once an individual cell has been selected, its true data is amplified and latched onto its digit line by a sense amp. The same sense amp also amplifies and latches the cell's complementary data onto another digit line. Thus, one digit line is high, usually approaching V.sub.cc, and the other digit line is low, 0 volts.
It is necessary to transfer the data from the digit lines to the output. This data transfer is accomplished by incorporating an output driver circuit into the DRAM. The output driver normally consists of two serially connected NMOS transistors wired in a push-pull arrangement as in FIG. 1A, where A is the data and B is A's complement. C is a control signal. The drain of the pull-up transistor 1 is connected to V.sub.cc, the source of the pull-down transistor 2 is connected to ground with the output pad 3 connected in parallel from the serial connection 4 to ground. The push-pull arrangement is conducive to low distortion, large load power and high efficiency. A second option for a push-pull circuit configuration is the three serially connected NMOS transistor arrangement shown in FIG. 1B. In this case the output pad 3 remains in parallel with the grounded pull-down transistor 2 and the two upper transistors 5 constitute the pull-up transistor. There are problems encountered in either arrangement. First it is necessary to use large pull up transistors for a total size in the range of 4500 microns. These large transistors require more space. Further, the use of NMOS transistors makes the circuit subject to negative input injection. Large initial drain currents in an ouput driver circuit are also noise conducive.